We are looking for talented and creative people to join our world-class team in the design of ARMv8 based System-on-Chip.

As an ASIC Design Engineer, you will use your RTL design skills to implement complex SOCs for advanced ARMv8-based server systems and State-of-the-art communication components. You will collaborate closely with SOC architecture and verification engineers in active projects and sustaining engineering activities. Using your Verilog and System Verilog coding and problem solving skills, you will design internally developed IPs as well as integrating 3rd party IPs. You will be responsible for the full life cycle of design, from specification creation and RTL coding to synthesis and timing closure.
Responsibilities: Responsibilities will include all, or some, of the following:

• Creating detailed design specifications based on architecture and micro-architecture specifications.
• Becoming proficient in complex IO protocols such as Gen3/Gen4 PCIe, SATA 3.0, USB 2.0/3.0 and integration of 3rd party host controllers for these protocols.
• Understanding of SOC bus architectures such as AXI3/AXI4, AHB, APB and advanced connectivity implementations such as Network-On-Chip (NoC).
• RTL design and coding that meets or exceeds design performance targets.
• Development of RTL Linting and CDC scripts, evaluation of results, and corrective actions
• Support silicon bring-up and Silicon validation
• RTL & Gate Simulation experience & Good debugging skills

Job Type: Full-time

Required education:

• Bachelor's

Required experience:

• ASIC Design: 2 years

Required language:

• English